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Field-programmable gate array
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661	Hybrid (Top) Front End Board (Top) Transition Add to Reading List Source URL: www.psi.ch Language: English - Date: 2012-05-29 10:38:25 Field-programmable gate array Computing Electronic engineering Electronics Cisco Nexus switches Dell PowerConnect Ethernet XAUI 10 Gigabit Ethernet
662	Microsoft Word - fpga061s-mishchenko1.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-12-16 19:04:56 Digital electronics Electronic design And-inverter graph Field-programmable gate array Logic synthesis Static timing analysis Placement Logic optimization Propagation delay Electronic engineering Electronic design automation Formal methods
663	COMPANY OVERVIEW Digital Core Design is a leading IP Core provider and a System-on-Chip design house. The company was founded in 1999 and since the very beginning has been focused on IP Core architecture improvements. Ou Add to Reading List Source URL: dcd.pl Language: English - Date: 2014-10-23 09:06:18 Data transmission Universal asynchronous receiver/transmitter Embedded systems Microcontrollers 16550 UART VHDL Verilog COM Field-programmable gate array Electronic engineering Electronics Hardware description languages
664	Internet on Chip Gigabit Ethernet and Programmable Hardware Dr. Johannes Wolkerstorfer www.xFace.at Realraum Graz, January 26th 2010 Add to Reading List Source URL: realraum.at Language: English - Date: 2010-05-01 14:07:38 OSI protocols Computer networking Internet NetFPGA PHY Field-programmable gate array OSI model Data link layer Wake-on-LAN Ethernet Computing Data
665	SynaptiCAD Big Feature List SynaptiCAD was founded in 1992 to provide affordable high quality timing diagram editing tools. Since that time we have expanded our product line to include: VHDL & Verilog test bench generati Add to Reading List Source URL: www.syncad.com Language: English - Date: 2011-04-06 10:25:45 Verilog VHDL Waveform viewer Logic analyzer Field-programmable gate array Jitter Aldec Phase-locked loop Static timing analysis Electronic engineering Electronics Hardware description languages
666	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 11, NO. 3, JUNE[removed]Transactions Briefs__________________________________________________________________ Board-Level Multiterminal Net Assignm Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2003-07-31 11:09:07 Logic in computer science NP-complete problems Electronic design automation Formal methods Boolean algebra Boolean satisfiability problem Field-programmable gate array MOS Technology SID Hardware emulation Theoretical computer science Electronic engineering Applied mathematics
667	LUTMIN: FPGA Logic Synthesis with MUX-Based and Cascade Realizations Tsutomu Sasao 1 and Alan Mishchenko[removed]Dept. of Computer Science and Electronics, Kyushu Institute of Technology, Iizuka[removed], Japan Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-07-09 02:20:06 Boolean algebra Diagrams Field-programmable gate array Binary decision diagram Lookup table Xilinx Multiplexer Artificial neuron Function Computing Mathematics Electronic engineering
668	Global Delay Optimization using Structural Choices Abstract This paper presents a fast global method for delay optimization after technology mapping. Timing analysis is used to identify timing-critical areas in the mappe Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-09-11 21:52:58 Digital electronics Electrical circuits Diagrams And-inverter graph Field-programmable gate array Static timing analysis Propagation delay Logic synthesis Retiming Electronic engineering Electronic design automation Formal methods
669	社団法人電子情報通信学会 THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS 信学技報 TECHNICAL REPORT OF IEICE Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-11-23 21:54:00 Computing Diagrams Binary decision diagram Model checking Electronic design automation Lookup table Boolean function Field-programmable gate array Canonical form Mathematics Boolean algebra Electronic engineering
670	VLSI DESIGN 1996, Vol. 4, No. 2, pp. i-ii (C[removed]Reprints available directly from the publisher Add to Reading List Source URL: downloads.hindawi.com Language: English - Date: 2014-05-11 09:05:38 Logic design Field-programmable gate array Hindawi Publishing Corporation CPU design Logic simulation Parallel computing Application-specific integrated circuit Digital electronics Simulation Electronic engineering Electronic design automation Integrated circuits

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